In the manufacturing process of semiconductor devices, numerous processing steps involve subjecting device structures to high temperature treatments in the presence of oxygen. For instance, the fabrication of high dielectric constant oxide materials requires typical annealing conditions of 650.degree. C. for 30 minutes while isolation of polycide gate stacks requires annealing conditions of 1050.degree. C. for 20 seconds. In the former application, a problem which generally occurs during the fabrication of such high dielectric materials is the oxidation of the underlying silicon. The oxidation forms an insulating silica layer between high permittivity oxide and silicon substrate which eliminates the electrical contact to the underlying substrate and forms a capacitor of lower dielectric constant (SiO.sub.2). Other researchers have evaluated a host of barrier layers placed between the silicon and the high dielectric layer, however, none of the evaluated materials promise to be sufficient barriers to prevent silicon oxidation.
For instance, conductive binary nitrides diffusion barrier materials such as TiN, WN and TaN are common in some VLSI applications, i.e, in contact holes, and are used to separate conductors from underlying silicon. However, most of these materials are not suitable diffusion barriers for use in the above mentioned applications because they cannot withstand the oxidation cycles that the device is subjected to. In addition, other researchers have investigated elemental metals such as Pt, Au and Ru for the prevention of diffusion of oxygen to the underlying layer of silicon and its subsequent oxidation. It was found that none of the pure metals prevented the diffusion and the resulting silica formation. A break in the electrical conduction path to the silicon substrate occurred as a result.
The conductive binary nitrides have also been evaluated for use in gate stacks. Experiments have shown that for sub-micron transistors, such conventional barriers allow oxidation to proceed from the sidewall several thousand angstroms to the gate and thereby severely degrade the high frequency performance of the device through parasitic resistance and capacitance. On the other hand, a 2.5 nm thick electrically insulating Si.sub.3 N.sub.4 barrier was found to resist oxidation, yet allow electrical contact between the polysilicon and overlying metallic strap through tunneling conduction. However, this solution is not manufacturable since the tunneling current is exponentially dependent on barrier thickness, thus requiring very precise control of thickness across the wafer and among wafers.
Other researchers have attempted to eliminate the need for a diffusion barrier in the gate stack by restricting the CMOS design to a single work function gate. In this approach, only one doping type is used in the gate polysilicon, thus eliminating the problem of dopant interdiffusion. Dopant depletion is then addressed by increasing the dosage of the dopant. The drawback of this approach is that the performance of one of the devices, either a PFET or a NFET is reduced because the gate is of the opposite carrier type and thus has a less than optimal work function.
It is therefore an object of the present invention to provide a diffusion barrier for use in a multilayer device that does not have the shortcomings of the prior art diffusion barriers.
It is another object of the present invention to provide a diffusion barrier that can be fabricated in a simple manufacturing process.
It is a further object of the present invention to provide a diffusion barrier capable of sustaining the high processing temperatures encountered in semiconductor processing steps.
It is another further object of the present invention to provide an oxygen diffusion barrier for devices incorporating high dielectric constant oxide layers.
It is yet another object of the present invention to provide an oxygen diffusion barrier made of an electrically conductive material of less than several thousand .mu..OMEGA.-cm that is applicable to a capacitor device.
It is still another object of the present invention to provide an oxygen diffusion barrier that is electrically conductive and thermally stable for use in the growth of high dielectric constant oxide compounds on silicon substrates.
It is still another further object of the present invention to provide an oxidation-resistant dopant diffusion barrier that can be suitably used in a polycide gate stack for a CMOS device.
It is yet another further object of the present invention to provide an oxidation-resistant dopant diffusion barrier that allows the fabrication of a dual work function polycide CMOS device that is resistant to oxidation and has a wide process window.